AICTE sponsored 5 Days Workshop NanoTech based VLSI physical design

The Research and Development Cell and Department of Computer Science & Engineering has organized an AICTE sponsored 5 days workshop on “Nano Technology based VLSI Physical Design” conducted between 4th and 8th of December 2017 Coordinated by Dr. R. Ravi, Director(Research) and Co-coordinated by Dr. G. Rajakumar, Professor, ECE Department.

The programme was inaugurated by Dr. P. Latha, M.E., Ph.D., MISTE., Asso. Professor & Head/CSE, Government College of Engineering, Tirunelveli. After the inauguration speech the session was taken over by Dr. G. Rajakumar about “Overview of VLSI Physical Design”. The afternoon session is all about the ” Research Issues in Nano Technology based VLSI Design” delivered by Dr. G. Rajakumar. The second day was a practical session, which was handled by Er. Madhavan, CEO, NTech Solution Pvt. Ltd, Chennai about “Practical Session on Tanner based Nano Scale VLSI Design” session was about the “Practical Design based Micro-wind Technology” by Er. Madhavan, CEO, NTech Solution Pvt. Ltd, Chennai. Practical Session on Xilinx ISE 8.1i based Nano Scale VLSI Design was delivered by Dr. G. Rajakumar, in this session the participants practically exercised the basic Xilinx debugging using the ISE 8.1i based simulation software. The session was handled by Dr. G. Rajakumar, he delivers the future research focus with the use of Xilinx ISE 8.1i simulation software. In addition he teaches about the logical gate simulation with hands-on training and explained about the research activities involved in its ultra level gate structures. Dr. R. Ravi, taken this session and provided  lecture on “The research approach between Cyber Forensic and VLSI Design”. In this lecture, the participants were given an idea about recent cyber forensic technologies and awareness of cyber attacks in social and banking websites. Prof. M. Navaneetha  Velammal, given a detailed lecture on “An overview about Digital Nano Scale System Design”. In this session, the application of bipolar junction devices, Field Effective Transistors and notated the derivate approaches in nano technology.

This session was handled by Dr. N. B. Balamurugan, Professor/ECE, Thiagarajar College of Engineering. This session “An overview about Nano Scale Analog Device Modeling” was very useful to the delegates in a way that he handled practical usage of VLSI design in various analog and digital device streams under communication area. In this session, Dr. N. B. Balamurugan delivered the research oriented techniques for the designing of various conceptual VLSI techniques also he conducted a questionnaire session through online in VLSI modeling to all the delegates.

After this session the valedictory function was presided by our beloved principal Dr. V. Ilangovan M.E., Ph.D., FIE., to honor all our guest and delegates. This valedictory welcome was provided by Dr. G. Aravand Swaminathan, Assoc. Professor/CSE,FXEC. The certificates were distributed by our beloved principal and the Chief guest Dr. N. B. Balamurugan, Professor of Thiagarajar College of Engineering. The function was concluded with vote of thanks by Dr. R. Ravi, Director(Research).

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